1. Field of the Invention
This invention relates to the field of switching voltage converters, and particularly to boost converters which employ a switch in series with the boost converter output.
2. Description of the Related Art
Switching voltage converters are well-known and widely-used to provide regulated output voltages. Such converters can be configured in a number of different ways; one configuration is known as a “boost” converter, which can provide an output voltage that is greater than the input voltage supplied to the converter.
A basic boost converter is shown in FIG. 1a. An inductor L1 is connected between the input voltage Vin and a switching node 10, and a switch—here implemented with a field-effect transistor (FET) MN1—is connected between switching node 10 and a circuit common point 12. A diode D1 is connected in series between node 10 and the converter's output at node 18. MN1 is part of a switching circuit 14 which includes a controller 16 that cycles MN1 so as to periodically connect L1 across input voltage Vin. When MN1 is turned on, the voltage at switching node 10 (Vsw) goes low and the current in L1 ramps up in proportion to the voltage across it and inversely to its inductance. When MN1 is turned off, Vsw goes high until D1 conducts, a point when the voltage across the inductor is reversed and the current in L1 ramps down. When Vsw is sufficiently positive, current is conducted via D1 to a load capacitor C1 at the converter's output node 18 to produce the converter's output voltage Vout. A feedback circuit 22 provides a signal which varies with the voltage at node 18 to controller 16, which adjusts the duty ratio of MN1 so as to regulate the voltage at node 18. C1 is made large enough to average the current pulses from L1 through D1 and keep the load ripple voltage below some desired minimum.
A common problem in the application of this type of boost converter is that, although the switching of MN1 can be stopped by a control signal (not shown), Vout will not go to zero if Vin is present. Instead, the path from Vin through L1 and D1 to output node 18 will keep Vout from falling much below Vin. In some applications, such as powering the control electronics for an LCD display, this feedthrough is undesirable. In these cases, Vout should remain substantially zero when Vin is initially applied, until other electronics also powered from Vin can be activated.
FIG. 1b illustrates a known solution to this problem. A series switch, typically a PMOS FET MP1, is connected between node 18 and a node 20. Node 18 is now an intermediate node, and node 20 becomes the converter's output node at which output voltage Vout is provided. A second load capacitor C2 would typically be connected between node 20 and circuit common. MP1 is controlled with a switch control circuit 24; when switch control circuit 24 holds MP1's gate voltage close to its source voltage, the switch will be off, and output voltage Vout can remain substantially zero, even though C1 may be charged to Vin. After Vin is applied and other circuits powered by Vin have reached some desired operating condition, switch control circuit 24 can drive the gate of MP1 low, turning it on and connecting the voltage on C4 to output node 20. This makes Vout approximately equal to either Vin by way of L1 and D1 if switching has not been initiated, or to the boosted voltage present on C4 by virtue of having started the boost converter switching.
This solution has a drawback, however. The voltage on C1 is regulated by the feedback loop connected to node 18. This works well when node 18 is the converter's output node, but when the series switch is added, some regulation is lost due to MP1's series resistance. Therefore, in order to maintain good load regulation, a device which may be unacceptably large is needed for MP1 to minimize this resistance.